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AU5325去抖時鐘
  • 輸出頻率范圍:
    up to 2.1GHz
  • 相位噪聲:
    <150fs rms jitter
  • 輸入/輸出:
    4 input / 10 outputs
  • 供電電壓:
    VDD 1.8V~3.3V / VDDIN 3.3V, VDDO1.8V~3.3V
AU5325
Features

? Quad PLL frequency translation from a common input

? <150 fs typical rms integrated jitter performance

? LVPECL, CML, HCSL, LVDS and LVCMOS Outputs

? Synchronized, holdover or free run operation modes

? Hitless input clock switching: Auto or manual

System Benefits

? Lower Phase noise to minimizing bit error rate in the system

? Better signal integrity helps designer ease implementation and project faster time to market

? Higher function integration reduce system BOM 

Applications

? OTN/PTN

? BBU/RRU

? LAN Switch/Router

? Small Cell

? Acceleration card

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